RapidIO Leader Delivers Next Generation RapidIO Switching IP
Santa Rosa, Calif. (September 14, 2018). Praesum Communications continues to be a vanguard in networking technology with the introduction of RapidIO® Distributed Queuing Unit (DQU) switching IP, a scalable switch architecture capable of multi-terabit aggregate switching performance.
Silicon-proven Solution Enables RapidIO Connectivity for ARM® AMBA Eco-System
Petaluma, Calif. (May 21, 2013). Praesum Communications announces general availability of its Serial RapidIO 2.2 Endpoint Core for ARM AMBA 4 AXI4. "The Praesum Communications AXI to RapidIO interface is a key enabling technology required by ARM-based processing solutions to operate in these applications," said Sam Fuller, Executive Director of the RapidIO Trade Association. "Praesum is an active contributor to the RapidIO specification development, and a long time provider of RapidIO technology to the industry."
Leading RapidIO Solutions Provider Deploys Smart Switching Technologies
Petaluma, CA January 22, 2013. Praesum Communications announced today that they have re-joined the RapidIO Trade Association as a sponsor. As one of the earliest adopters of RapidIO, Praesum has been committed to creating smart switching technologies in the form of Intellectual Property (IP) cores, boards, and system level products for more than a decade.
Silicon-proven Solution Enables RapidIO Connectivity for Military Aerospaceand Other Signal Processing Markets
Petaluma, CA, January 11, 2011, Praesum Communications announces general availability of its Serial RapidIO 2.1 Endpoint Core. “Our early access customers have been deploying the 2.1 core for more than a year,” said Praesum CEO Kent Dahlgren. “We are now offering the core to all customers.” Like the entire Praesum IP product line, the Serial RapidIO 2.1 Endpoint Core provides the following benefits:
Solution Enables Low Cost RapidIO Connectivity for Wireless Infrastructure and Other Markets
Petaluma, CA, January 28, 2008, Praesum Communications continues to expand its portfolio of Serial RapidIO Endpoint solutions with support for the LatticeECP2M™ family of low-cost FPGAs. In addition, Praesum has joined Lattice's ispLeverCORE™ Connections IP partner program.
RapidIO Leader Delivers First Member of Switching Tool-Kit Family
February 14, 2005, Petaluma, California. Praesum Communications continues to break new ground in networking technology with the introduction of RapidIO SwitchKit, a set of Intellectual Property (IP) building blocks for quickly creating customized RapidIO switches.
Preasum Communications, Inc. announced today availability of a new RapidIO IO Logical Layer Initiator Intellectual (IP) Property core. This core, when combined with Praesum’s RapidIO Physical Layer core, represents a complete solution for creating RapidIO processors. The solution has been demonstrated in a Xilinx Virtex-II Pro FPGA resulting the world’s first RapidIO processor.
Praesum Communications, an emerging developer of new generation networking and telecommunications equipment, has released the first Rapid IO Core Technology to Xilinx, Inc. The core addresses the demand for high-performance networking and equipment with a 64-bit high performance implementation of Rapid IO capable of scaling to OC-192 line rates or 10 gigabit per second. The core is fully compliant with Revision 1.1 of the RapidIO Physical Layer 8/16 LP-LVDS specification, and supports a flexible buffer management scheme suitable for both end-station and switch-port applications.