Praesum Communications engineering staff has over sixty years of aggregate experience in high performance FPGA and ASIC design.

Praesum has extensive experience with the development/porting and tuning of OpenCL kernels across a wide range of platforms. We provide a complete range of services for OpenCL HPEC projects:

  • System partitioning

  • Spec development

  • Kernel development and performance tuning

  • Benchmarking and validation

  • HPEC cluster development based on Warthog Tile​

Praesum is a member of the

Intel FPGA Design Services Network.

Praesum is a member of the

Xilinx Alliance Program.

Corporate Offices:

3558 Round Barn Blvd., Suite 200

Santa Rosa, California 95403


Telephone: (707) 300-6455


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