FOR IMMEDIATE RELEASE

Praesum Communications Introduces Serial RapidIO® 2.1 Endpoint IP

 

Silicon-proven Solution Enables RapidIO Connectivity for Military Aerospaceand Other Signal Processing Markets

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Petaluma, CA, January 11, 2011, Praesum Communications announces general availability of its Serial RapidIO 2.1 Endpoint Core. “Our early access customers have been deploying the 2.1 core for more than a year,” said Praesum CEO Kent Dahlgren. “We are now offering the core to all customers.” Like the entire Praesum IP product line, the Serial RapidIO 2.1 Endpoint Core provides the following benefits:

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Maturity: For more than a decade, Praesum has been delivering and deploying RapidIO technology. We introduced the first RapidIO IP core in 2000, and the first RapidIO switching IP in 2004.  With the introduction of the first RapidIO 2.1 Endpoint Core in January 2010, Praesum has the only silicon-proven core that supports FPGA platforms.

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Portability: Praesum’s RapidIO 2.1 Endpoint IP is the only RapidIO IP that has been ported to all of the major FPGA and ASIC platforms. This means that your RapidIO-based designs can be easily retargeted to the best FPGA or ASIC platform for the task at hand. This preserves your design investment and shortens your time to market.

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Flexibility: Praesum's IP cores are designed to let you include only the functions needed for your application. This saves precious device resources on programmable platforms, which in turn reduces power and cost.

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Specific technical benefits of the Praesum RapidIO 2.1 Endpoint IP include:

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• Complete implementation of Rev. 2.1 of the RapidIO Physical Layer LP-Serial protocol.

• Implements RapidIO Error Management Extensions

• Supports 1x, 2x, and 4x link widths.

• Management Entity with integrated decoder for RapidIO maintenance transactions.

• Management Entity supports optional soft packet interface which enables software implementations of logical layer functions.

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Praesum’s Serial RapidIO 2x Endpoint IP Core is available in two forms: As Verilog RTL source code or as compiled netlists for Xilinx, Altera and Lattice FPGAs.  Netlists for Lattice FPGAs are available directly from Lattice Semiconductor.

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About Praesum Communications

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Praesum Communications is the RapidIO solutions leader. Our Serial RapidIO Endpoint and Switching IP enable next generation systems. Founded in January 2000, Praesum has its headquarters in Petaluma, CA. For more information, visit the Praesum web site at www.praesum.com.

 

Product Marketing Contact:
Kent Dahlgren
Praesum Communications, Inc.
(707) 338-0946
kent@praesum.com

 

RapidIO is a registered trademark of the RapidIO Trade Association. Product and company names mentioned may be trademarks and/or registered trademarks of their respective holders.